Matrix: Stevenson/LargeRegFile

Description: large register file, digital circuit optimization

Stevenson/LargeRegFile graph
(bipartite graph drawing)


Stevenson/LargeRegFile dmperm of Stevenson/LargeRegFile
scc of Stevenson/LargeRegFile

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  • Matrix group: Stevenson
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  • download as a MATLAB mat-file, file size: 8 MB. Use UFget(2273) or UFget('Stevenson/LargeRegFile') in MATLAB.
  • download in Matrix Market format, file size: 16 MB.
  • download in Rutherford/Boeing format, file size: 12 MB.

    Matrix properties
    number of rows2,111,154
    number of columns801,374
    nonzeros4,944,201
    structural full rank?yes
    structural rank801,374
    # of blocks from dmperm32,778
    # strongly connected comp.2
    explicit zero entries0
    nonzero pattern symmetry 0%
    numeric value symmetry 0%
    typereal
    structurerectangular
    Cholesky candidate?no
    positive definite?no

    authorJ. Stevenson
    editorT. Davis
    date2010
    kindcircuit simulation problem
    2D/3D problem?no

    Notes:

    Circuit optimization for digital circuits.  John Peter Stevenson, Stanford.
                                                                               
    LargeRegFile is a matrix representing an optimization problem.             
    Specifically, it is a geometric program, a kind of convex optimization     
    problem.  The matrix entries are the exponents found in the geometric      
    program constraints; specifically, this matrix is a portion of the         
    input required by mskexpopt:                                               
    http://docs.mosek.com/6.0/capi/node008.html                                
                                                                               
    This matrix represents a digital circuit.  The circuit is a large          
    register file: 256 registers, 64 bits each, 2 read ports, 1 write port.    
    The optimization problem is to minimize circuit delay, subject to          
    constraints on energy cost and area cost. The optimization variables       
    are the transistor size, the supply voltage, and the threshold voltage.    
    The circuit optimization method is described by Patil, et. al.: Robust     
    energy-efficient adder topologies. In ARITH07: Proceedings of the 18th     
    IEEE Symposium on Computer Arithmetic, pages 16-28, Washington, DC,        
    USA, 2007. IEEE Computer Society.                                          
    

    Ordering statistics:result
    nnz(V) for QR, upper bound nnz(L) for LU, with COLAMD916,786,879
    nnz(R) for QR, upper bound nnz(U) for LU, with COLAMD4,902,416

    For a description of the statistics displayed above, click here.

    Maintained by Tim Davis, last updated 12-Mar-2014.
    Matrix pictures by cspy, a MATLAB function in the CSparse package.
    Matrix graphs by Yifan Hu, AT&T Labs Visualization Group.