University of Florida / Center for Computer Vision & Visualization

AIM Project - Adaptive Image Manager

Sponsor: DARPA/ITO Adaptive Computing Systems Program

Principal Investigator:

ritter@cise.ufl.edu

Project Leader:

mssz@cise.ufl.edu

Co-Principal Investigator:

jnw@cise.ufl.edu

Department of Computer & Information Science & Engineering
University of Florida
P.O. Box 116120
Gainesville, FL 32611-6120

AIM Overview

Tasks performed by image and signal processing (ISP) hardware are growing in complexity due to a nonlinearly increasing image data burden and increased depth of computation incurred by more sophisticated image understanding or compression algorithms. Power and space limitations upon on-board processor design motivate the increasing prevalence of distributed computation for ISP algorithms. In realistic airborne sensing and processing scenarios, processor fault and failure rates can increase due to a variety of hazards such as channel jamming and exposure to various types of radiation. Hence, it is reasonable to expect that fault tolerance should be built into software that maps ISP algorithms to such hardware systems.

In response to this situation, the AIM Project proposes to radically enhance the Parallel Image Manager (PIM) server developed at University of Florida's Center for Computer Vision and Visualization (UF/CCVV), to map image and signal processing (ISP) algorithms around faulting or failing components in a heterogeneous network of processors. All or a portion of such hardware could be reconfigurable SIMD or SMP processors as well as machines based on field-programmable gate arrays (FPGAs). In practice, each device could exhibit idiosyncratic faulting or failing behaviors.

AIM's Status Manager and Multi-Level Debugger would implement fault tolerance by routing the algorithm mapping process around defective hardware. We expect to achieve this goal via a periodically-updated status map that would describe the state of each hardware component in a given computational system. Status updates would be relayed by flexible libraries designed to control and monitor computational hardware.

Advantageous Features. In practice, AIM would have the following practical advantages:

Application- and Architecture-Independent Programming Interface that would use image algebra as the algorithm representation language. Image algebra was developed at UF under DARPA and Air Force sponsorship for over a decade, and has been implemented on numerous workstations and parallel processors. Image algebra is a concise, rigorous, computationally complete notation that unifies linear and nonlinear mathematics in the image domain, and hence presents a unifying notation for signal and image processing.
The PIM server can support a Khoros interface designed in-house. This capability would be extended to the AIM system. Additionally, UF/CCVV's Image Algebra Project is developing an equation-editor type of GUI for entering mathematical representations of image algebra, which would write error-free image algebra C++ code. We thus expect to drastically reduce software development and testing time, as we have by using image algebra in previous research.
Fault Tolerance due to algorithm mapping that is constrained by status information about each processor and network communication channel.
Computational Efficiency resulting from optimization heuristics inherent in PIM, which we plan to extend throughout the AIM project.
Rigor and Computational Completeness due to the use of image algebra, which can express all image and signal processing operations in terms of a compact collection of operations (less than one dozen operations in nonrecursive image algebra).

Key features of AIM are Symbolic- and Execution-Level Debuggers that would work together with AIM's Status Manager to determine whether or not incorrect assignments of operations to given hardware components were scheduled. For example, if a 3x3-pixel convolver was suddently unavailable (due to a fault or failure mode), another device with similar capabilities would be located, where available, and would be substituted for the original resource, when available. Meanwhile, computations originally mapped to the convolver would be suspended, thereby implying sophisticated capabilities for managing out-of-order execution. Such capabilities have been developed in part for PIM, and would be greatly enhanced in the AIM system.

Technical Challenges. Expected areas of scientific or technical difficulty include:

Development of Computational Models that describee processor faulting and failing behaviors as well as routine functionality. Such models are currently under development for a variety of processors, including Lockheed-Martin Corporation's PAL-I and PAL-II, MasPar MP-2, Cambridge Parallel Processing Gamma-II SIMD machines, SGI Enterprise 2000 SMP machine, and a variety of FPGA-based processors.
Mapping between Logical (Software) and Physical (Hardware) Models to achieve implementation of an algorithm or expression on a given ensemble of computational hardware. This problem is being solved via a multi-level modelling approach that utilizes the Open Distributed Processing Reference Model (ODP/RM) at a high level, capability-based scheduling at an intermediate level, and is expected to employ VHDL-to-bitmap compilation to derive FPGA configuration maps for small functional units (e.g., within an FPGA partition).
Development and Implementation of Performance Measures that describe and provide a basis for the evaluation of efficiency, reliability, and accuracy of algorithm-to-hardware mapping strategies employed in the AIM software.

AIM Personnel and Partners

Principal Investigator Gerhard X. Ritter is Professor and Chair of the CISE Department, Professor of Mathematics, and Director of the Center for Computer Vision and Visualization.

Co-Principal Investigator and Project Leader Mark S. Schmalz is a faculty member in the CISE Department.

Co-Principal Investigator Joseph N. Wilson is a faculty member and Associate Chair of the CISE Department.

Graduate Students include:

Allen Hux (GUI/software design and implementation)
Skander Slama (GUI/software design and implementation)
Monica Sweat (theory/model development and implementation)

Undergraduate Students include:

Sean Denney (models of computation)

Subcontractors include:

Lockheed-Martin Electronics and Missiles
Group, Orlando, FL; and
Lockheed-Martin Sanders, Nashua, NH

AIM Facilities
The Center for Computer Vision and Visualization is one of four research centers at University of Florida's Department of CISE. All UF/CCVV personnel have access to the Departmental network of over 200 Sun and SGI workstations, monochrome and color laser printers, file servers, etc. UF/CCVV is affiliated with UF/CISE's Parallel Research Laboratory (PRL), which has a 64-processor N-Cube MIMD machine, 1,024-processor MasPar MP-2 and 9,120-processor PAL-I SIMD machines.
The PAL processor is the first in a series of fast, compact SIMD machines designed for image and signal processing applications. Developed under the sponsorship of the PAL consortium (USAF Research Laboratory, Lockheed-Martin Corp., and University of Florida), PAL-I is capable of more than 385 MOPs (8-bit operations). PAL-II, which is in fabrication, is expected to achieve peak throughput of 2.5 GOPs (32-bit IEEE floating point operations) in a 4x6-inch form factor.

AIM Project Information
Publically-available project data are grouped as follows:
Presentations (selected viewgraphs)

Technology Transfer Page

Technical Notes and
Research Papers

Software and Links to related Web pages

Bibliography of salient references.

This document is Copyright © 1997,1998 by UF/CCVV.
All rights reserved, except for use by the U.S. Government and its agencies or contractors.