Authors:    Prabhat Mishra and Nikil Dutt Publisher:   Springer, July 2005 ISBN:   0-387-26143-5 Contents:           Introduction            Architecture Specification            Validation of Specification         Top-Down Validation             Executable Model Generation             Design Validation             Functional Test Generation         Future Directions         Appendices             Survey of Contemporary ADLs             Specification of DLX Processor             Interrupts & Exceptions in ADL             Validation of DLX Specification             Design Space Exploration

Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models.

This book presents a top-down validation methodology that complements the existing bottom-up approaches. It leverages the system architect’s knowledge about the behavior of the design through architecture specification using an Architecture Description Language (ADL). The authors also address two fundamental challenges in functional verification: lack of a golden reference model, and lack of a comprehensive functional coverage metric.

This book is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems.