The assigned exercises are not to be turned in as homework, but may appear (in slightly different form) as exam questions (hint...):
Exercises are listed by section in the Web notes, as follows:
Read: Text - Chapter 1 - Computer Abstractions and Technology Ex's: Listed by subsection, below
Read: Text: Sections 1.1-1.3, Web: Appendix B Ex's: Not to turn in: Ex. 1.1.1 - 1.1.101.2. Overview of Computer Abstractions
Read: Text: Sections 1.2-1.3 Ex's: Not to turn in: Ex. 1.1.11 - 1.1.261.3. Overview of Computer Technology Trends
Read: Text: Sections 1.4-1.6 Ex's: Not to turn in: All of Ex. 1.21.4. Digital Logic Design
Read: Text: Appendix C (textbook, not Web page) Ex's: TBA1.5. Computer Performance Assessment
Read: Text: Section 1.4, also pp. 26-38 Ex's: Not to turn in: Ex. 1.3 - 1.51.6. Performance Benchmarking
Read: Text: pp. 48-50, 657-667 Ex's: Not to turn in: Ex. 1.6 - 1.8
Read: Text - Chapter 2 - Instructions: Language of the Computer Ex's: Listed by subsection, below
Read: Text: pp. 21, 54, 161-165, Ex's: Not to turn in: Ex. 2.1 - 2.42.2. Instruction Representation
Read: Text: Sections 2.1 - 2.5 Ex's: Not to turn in: Ex. 2.5 - 2.62.3. Decision Instructions and Procedure Support
Read: Text: Sections 2.6 - 2.13 Ex's: Not to turn in: Ex. 2.7 - 2.102.4. Number Representations, Data Types and Addressing
Read: Text: Sections 2.6 - 2.13 Ex's: Not to turn in: Ex. 2.14 - 2.162.5. MIPS Programs
Read: Text: Sections 2.14 - 2.20 Ex's: Not to turn in: Ex. 2.18 - 2.202.6. Pointers and Arrays
Read: Text: Sections 2.14 - 2.20 (Review) Ex's: Review previous Exercises (2.1 - 2.20)
Read: Appendix C, Chapter 3 - Arithmetic for Computers Ex's: Listed by subsection, below
Read: Text: Sections 3.1-3.3, Appendix C.4-C.6 Ex's: Not to turn in: Ex. 3.1, 3.23.2. Arithmetic Logic Units and the MIPS ALU
Read: Text: Appendix C.5 Ex's: Not to turn in: Ex. 3.33.3. Boolean Multiplication and Division
Read: Text: Sections 3.3-3.4 Ex's: Not to turn in: Ex. 3.4-3.93.4. Floating Point Arithmetic
Read: Text: Sections 3.5-3.6 Ex's: Not to turn in: Ex. 3.10-3.143.5. Floating Point in MIPS and Intel
Read: Text: Sections 3.6-3.8 Ex's: Not to turn in: Ex. 3.15
Read: Appendix D (Control), Chapter 4 - The Processor Ex's: Listed by subsection, below
Read: Text: Sections 4.1-4.2 Ex's: None4.2. Datapath Design and Implementation
Read: Text: Sections 4.2-4.4 Ex's: None4.3. Single-Cycle and Multicycle Datapaths
Read: Text: Appendix C.11, Appendix D.1 Ex's: Not to turn in: Ex. 4.1, 4.2, 4.7, 4.94.4. Controller Finite State Machines
Read: Text: Appendix C.10-C.11, Appendix D.2-D.3 Ex's: Not to turn in: Ex. 4.13, 4.144.5. Microprogrammed Control
Read: Text: Appendix D.4-D.6 Ex's: Not to turn in: Ex. 4.15
Read: Chapter 5 Ex's: Listed by subsection, below
Read: Text: Section 4.6, also review Appendix D Ex's: Not to turn in: Ex. 4.16-4.185.2. Pipeline Datapath Design and Implementation
Read: Text: Sections 4.5-4.7 Ex's: Review Ex's assigned thus far5.3. Pipeline Control and Hazards
Read: Text: Sections 4.7-4.9 Ex's: Review Ex's assigned thus far5.4. Pipeline Performance Analysis
Read: Text: Sections 4.9-4.14 Ex's: Not to turn in: 4.19-4.21
Read: Chapter 5 - Large and Fast: Exploiting Memory Hierarchies Ex's: Listed by subsection, below6.1. Overview of Memory Hierarchies
Read: Text: Section 5.1,5.2 Ex's: Not to turn in: Ex. 5.1, 5.26.2. Basics of Cache and Virtual Memory
Read: Text: Sections 5.2-5.6 Ex's: Not to turn in: Ex. 5.3-5.86.3. Memory Systems Performance Analysis & Metrics
Read: Text: Sections 5.7-5.10 Ex's: Not to turn in: Ex. 5.9-5.126.4. I/O Devices and Buses
Read: Text: Sections 6.1-6.7 Ex's: Not to turn in: Ex. 6.1-6.9
...more to come...
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